The present invention relates to a semiconductor integrated circuit device, and more particularly to a package for a semiconductor element (or die) having a plurality of electrodes to be applied with substantially the same voltage.
A semiconductor integrated circuit device is assembled by mounting a semiconductor element in a package and wiring electrodes of the semiconductor element with lead terminals provided on the package and connected to external leads which are in turn attached to the package. The semiconductor element provides a large number of active elements such as transistors and diodes and passive elements such as resistors and capacitors within one semiconductor chip which are interconnected by a metal layer deposited thereon in accordance with the required circuit function.
Due on the increasing commercial demands to semiconductor integrated devices for additional functions and enhancement of signal processing capability, the number of active and passive elements formed in one semiconductor chip, (that is, the integration density) is being increased, resulting in the increase in size of the semiconductor chip. Further, in order to operate at a high speed of signal processing, the amplitude of the signals processed by the integrated circuit device is lowered. In other words, a noise margin is reduced.
The increase in integration density or in size of the semiconductor chip enlarges the length of wiring layer and causes a potential shift of an actuating voltage such as a power supply voltage or the ground potential. Such a potential shift may cause a mulfunction of the circuit. In more detail, the integrated circuit device receives the power voltage along with the signals to be processed to actuate the active and/or passive circuit elements. The power voltage is generally supplied to one electrode of the semiconductor chip through one external lead provided on the package. This electrode is connected to the circuit elements requiring the power voltage via a wiring layer deposited on the semiconductor chip. The increase in the integration density increases the number of wirings for interconnecting circuit elements. That is, the wiring density is increased. Consequently, the wiring layer for connecting the electrode on the chip for receiving the power voltage (hereinafter called "power voltage electrode") to the circuit elements is compelled to become narrow and thin. In addition, the increase in size of the semiconductor chip elongates the length of the wiring layer, resulting in increase of the impedance of the wiring layer. As a result, a voltage different from that at the power voltage electrode is actually supplied to the circuit elements. In other words, the potential shift occurs. This potential shift causes a malfunction of circuit because the noise margin is small for the purpose of high processing speed. The same phenomena sometimes occur in the wiring layer for ground potential.
The aforementioned potential shift can be suppressed by providing a plurality of power voltage electrodes on the semiconductor chip. For instance, four power voltage electrodes are provided on the respective four edges of the semiconductor chip of a rectangular shape. In this manner, the circuit elements can receive the power voltage from the nearest power voltage electrode depending upon the disposed positions of the respective elements within the semiconductor chip. Accordingly, the lengths of the wiring layers connecting the power voltage electrodes to the circuit elements are shortened, resulting in the decrease in impedances of the wiring layers.
However, the formation of a plurality of the power voltage electrodes causes the increase in number of external leads. For instance, the provision of four power voltage electrodes necessitates four external leads. In other words, three extra external leads may additionally be required as compared to the conventional devices. An increase in number of the external leads enlarges the package, resulting in an expensive device. If the integrated circuit chip having a plurality of power voltage electrodes is mounted within a package whose external leads are predetermined in number, the number of external lead terminals for receiving signals to be processed and for deriving processed signals is reduced. Consequently, it is actually impossible to increase the integration density and/or the number of functions.